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raw | patch | inline | side by side (parent: b163652)
author | Vincent Brillault <git@lerya.net> | |
Thu, 12 Feb 2015 20:06:24 +0000 (21:06 +0100) | ||
committer | Vincent Brillault <git@lerya.net> | |
Sat, 28 Feb 2015 06:35:42 +0000 (07:35 +0100) |
Partial backport of 4e8e863fed2e82278d29c6357de8251adb73acb9
from Len Brown <len.brown@intel.com>
Add comments on all models
from Len Brown <len.brown@intel.com>
Add comments on all models
src/turbostat.c | patch | blob | history |
diff --git a/src/turbostat.c b/src/turbostat.c
index 4c45016fd8a4c8449729e6755b5fb6c54ac4d62e..2f30206a6c9f4db54062447c6736161af5461fb6 100644 (file)
--- a/src/turbostat.c
+++ b/src/turbostat.c
" model: %#x)", family, model);
}
switch (model) {
- case 0x2A:
- case 0x3A:
- case 0x3C:
- case 0x45:
- case 0x46:
+ case 0x2A: /* SNB */
+ case 0x3A: /* IVB */
+ case 0x3C: /* HSW */
+ case 0x45: /* HSW */
+ case 0x46: /* HSW */
+ case 0x3D: /* BDW */
do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_PKG_POWER_INFO | RAPL_GFX;
break;
- case 0x3F:
+ case 0x3F: /* HSX */
+ case 0x4F: /* BDX */
+ case 0x56: /* BDX-DE */
do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM | RAPL_DRAM_PERF_STATUS;
break;
- case 0x2D:
- case 0x3E:
+ case 0x2D: /* SNB Xeon */
+ case 0x3E: /* IVB Xeon */
do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_PKG_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM | RAPL_DRAM_PERF_STATUS;
break;
- case 0x37:
- case 0x4D:
+ case 0x37: /* BYT */
+ case 0x4D: /* AVN */
do_rapl = RAPL_PKG | RAPL_CORES;
break;
default: