1 /*
2 * turbostat -- Log CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors for collectd.
4 *
5 * Based on the 'turbostat' tool of the Linux kernel, found at
6 * linux/tools/power/x86/turbostat/turbostat.c:
7 * ----
8 * Copyright (c) 2013 Intel Corporation.
9 * Len Brown <len.brown@intel.com>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms and conditions of the GNU General Public License,
13 * version 2, as published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope it will be useful, but WITHOUT
16 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 * more details.
19 *
20 * You should have received a copy of the GNU General Public License along with
21 * this program; if not, write to the Free Software Foundation, Inc.,
22 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
23 * ----
24 * Ported to collectd by Vincent Brillault <git@lerya.net>
25 */
27 /*
28 * _GNU_SOURCE is required because of the following functions:
29 * - CPU_ISSET_S
30 * - CPU_ZERO_S
31 * - CPU_SET_S
32 * - CPU_FREE
33 * - CPU_ALLOC
34 * - CPU_ALLOC_SIZE
35 */
36 #define _GNU_SOURCE
38 #include <asm/msr-index.h>
39 #include <stdarg.h>
40 #include <stdio.h>
41 #include <err.h>
42 #include <unistd.h>
43 #include <sys/types.h>
44 #include <sys/wait.h>
45 #include <sys/stat.h>
46 #include <sys/resource.h>
47 #include <fcntl.h>
48 #include <signal.h>
49 #include <sys/time.h>
50 #include <stdlib.h>
51 #include <dirent.h>
52 #include <string.h>
53 #include <ctype.h>
54 #include <sched.h>
55 #include <cpuid.h>
57 #include "collectd.h"
58 #include "common.h"
59 #include "plugin.h"
61 #define PLUGIN_NAME "turbostat"
63 /*
64 * This tool uses the Model-Specific Registers (MSRs) present on Intel processors.
65 * The general description each of these registers, depending on the architecture,
66 * can be found in the IntelĀ® 64 and IA-32 Architectures Software Developer Manual,
67 * Volume 3 Chapter 35.
68 */
70 /*
71 * If set, aperf_mperf_unstable disables a/mperf based stats.
72 * This includes: C0 & C1 states, frequency
73 *
74 * This value is automatically set if mperf or aperf go backward
75 */
76 static _Bool aperf_mperf_unstable;
78 /*
79 * Bitmask of the list of core C states supported by the processor.
80 * Currently supported C-states (by this plugin): 3, 6, 7
81 */
82 static unsigned int do_core_cstate;
84 /*
85 * Bitmask of the list of pacages C states supported by the processor.
86 * Currently supported C-states (by this plugin): 2, 3, 6, 7, 8, 9, 10
87 */
88 static unsigned int do_pkg_cstate;
90 /*
91 * Boolean indicating if the processor supports 'Digital temperature sensor'
92 * This feature enables the monitoring of the temperature of each core
93 *
94 * This feature has two limitations:
95 * - if MSR_IA32_TEMPERATURE_TARGET is not supported, the absolute temperature might be wrong
96 * - Temperatures above the tcc_activation_temp are not recorded
97 */
98 static _Bool do_dts;
100 /*
101 * Boolean indicating if the processor supports 'Package thermal management'
102 * This feature allows the monitoring of the temperature of each package
103 *
104 * This feature has two limitations:
105 * - if MSR_IA32_TEMPERATURE_TARGET is not supported, the absolute temperature might be wrong
106 * - Temperatures above the tcc_activation_temp are not recorded
107 */
108 static _Bool do_ptm;
110 /*
111 * Thermal Control Circuit Activation Temperature as configured by the user.
112 * This override the automated detection via MSR_IA32_TEMPERATURE_TARGET
113 * and should only be used if the automated detection fails.
114 */
115 static unsigned int tcc_activation_temp;
117 static unsigned int do_rapl;
118 static double rapl_energy_units;
120 #define RAPL_PKG (1 << 0)
121 /* 0x610 MSR_PKG_POWER_LIMIT */
122 /* 0x611 MSR_PKG_ENERGY_STATUS */
123 #define RAPL_PKG_PERF_STATUS (1 << 1)
124 /* 0x613 MSR_PKG_PERF_STATUS */
125 #define RAPL_PKG_POWER_INFO (1 << 2)
126 /* 0x614 MSR_PKG_POWER_INFO */
128 #define RAPL_DRAM (1 << 3)
129 /* 0x618 MSR_DRAM_POWER_LIMIT */
130 /* 0x619 MSR_DRAM_ENERGY_STATUS */
131 /* 0x61c MSR_DRAM_POWER_INFO */
132 #define RAPL_DRAM_PERF_STATUS (1 << 4)
133 /* 0x61b MSR_DRAM_PERF_STATUS */
135 #define RAPL_CORES (1 << 5)
136 /* 0x638 MSR_PP0_POWER_LIMIT */
137 /* 0x639 MSR_PP0_ENERGY_STATUS */
138 #define RAPL_CORE_POLICY (1 << 6)
139 /* 0x63a MSR_PP0_POLICY */
142 #define RAPL_GFX (1 << 7)
143 /* 0x640 MSR_PP1_POWER_LIMIT */
144 /* 0x641 MSR_PP1_ENERGY_STATUS */
145 /* 0x642 MSR_PP1_POLICY */
146 #define TJMAX_DEFAULT 100
148 cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_saved_affinity_set;
149 size_t cpu_present_setsize, cpu_affinity_setsize, cpu_saved_affinity_setsize;
151 struct thread_data {
152 unsigned long long tsc;
153 unsigned long long aperf;
154 unsigned long long mperf;
155 unsigned long long c1;
156 unsigned int smi_count;
157 unsigned int cpu_id;
158 unsigned int flags;
159 #define CPU_IS_FIRST_THREAD_IN_CORE 0x2
160 #define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
161 } *thread_delta, *thread_even, *thread_odd;
163 struct core_data {
164 unsigned long long c3;
165 unsigned long long c6;
166 unsigned long long c7;
167 unsigned int core_temp_c;
168 unsigned int core_id;
169 } *core_delta, *core_even, *core_odd;
171 struct pkg_data {
172 unsigned long long pc2;
173 unsigned long long pc3;
174 unsigned long long pc6;
175 unsigned long long pc7;
176 unsigned long long pc8;
177 unsigned long long pc9;
178 unsigned long long pc10;
179 unsigned int package_id;
180 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
181 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
182 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
183 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
184 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
185 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
186 unsigned int tcc_activation_temp;
187 unsigned int pkg_temp_c;
188 } *package_delta, *package_even, *package_odd;
190 #define DELTA_COUNTERS thread_delta, core_delta, package_delta
191 #define ODD_COUNTERS thread_odd, core_odd, package_odd
192 #define EVEN_COUNTERS thread_even, core_even, package_even
193 static _Bool is_even = 1;
195 static _Bool allocated = 0;
196 static _Bool initialized = 0;
198 #define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
199 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
200 topo.num_threads_per_core + \
201 (core_no) * topo.num_threads_per_core + (thread_no))
202 #define GET_CORE(core_base, core_no, pkg_no) \
203 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
204 #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
206 struct topo_params {
207 int num_packages;
208 int num_cpus;
209 int num_cores;
210 int max_cpu_num;
211 int num_cores_per_pkg;
212 int num_threads_per_core;
213 } topo;
215 struct timeval tv_even, tv_odd, tv_delta;
217 enum return_values {
218 OK = 0,
219 ERR_CPU_MIGRATE,
220 ERR_CPU_SAVE_SCHED_AFFINITY,
221 ERR_MSR_IA32_APERF,
222 ERR_MSR_IA32_MPERF,
223 ERR_MSR_SMI_COUNT,
224 ERR_MSR_CORE_C3_RESIDENCY,
225 ERR_MSR_CORE_C6_RESIDENCY,
226 ERR_MSR_CORE_C7_RESIDENCY,
227 ERR_MSR_IA32_THERM_STATUS,
228 ERR_MSR_PKG_C3_RESIDENCY,
229 ERR_MSR_PKG_C6_RESIDENCY,
230 ERR_MSR_PKG_C2_RESIDENCY,
231 ERR_MSR_PKG_C7_RESIDENCY,
232 ERR_MSR_PKG_C8_RESIDENCY,
233 ERR_MSR_PKG_C9_RESIDENCY,
234 ERR_MSR_PKG_C10_RESIDENCY,
235 ERR_MSR_PKG_ENERGY_STATUS,
236 ERR_MSR_PKG_POWER_INFO,
237 ERR_MSR_PP0_ENERGY_STATUS,
238 ERR_MSR_DRAM_ENERGY_STATUS,
239 ERR_MSR_PP1_ENERGY_STATUS,
240 ERR_MSR_PKG_PERF_STATUS,
241 ERR_MSR_DRAM_PERF_STATUS,
242 ERR_MSR_IA32_PACKAGE_THERM_STATUS,
243 ERR_MSR_IA32_TSC,
244 ERR_CPU_NOT_PRESENT,
245 ERR_NO_MSR,
246 ERR_CANT_OPEN_MSR,
247 ERR_CANT_OPEN_FILE,
248 ERR_CANT_READ_NUMBER,
249 ERR_CANT_READ_PROC_STAT,
250 ERR_NO_INVARIANT_TSC,
251 ERR_NO_APERF,
252 ERR_CALLOC,
253 ERR_CPU_ALLOC,
254 ERR_NOT_ROOT,
255 UNSUPPORTED_CPU,
256 };
258 static int setup_all_buffers(void);
260 static int
261 cpu_is_not_present(int cpu)
262 {
263 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
264 }
265 /*
266 * run func(thread, core, package) in topology order
267 * skip non-present cpus
268 */
270 static int __attribute__((warn_unused_result))
271 for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
272 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
273 {
274 int retval, pkg_no, core_no, thread_no;
276 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
277 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
278 for (thread_no = 0; thread_no <
279 topo.num_threads_per_core; ++thread_no) {
280 struct thread_data *t;
281 struct core_data *c;
282 struct pkg_data *p;
284 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
286 if (cpu_is_not_present(t->cpu_id))
287 continue;
289 c = GET_CORE(core_base, core_no, pkg_no);
290 p = GET_PKG(pkg_base, pkg_no);
292 retval = func(t, c, p);
293 if (retval)
294 return retval;
295 }
296 }
297 }
298 return 0;
299 }
301 /*
302 * Open a MSR device for reading
303 * Can change the scheduling affinity of the current process if multiple_read is 1
304 */
305 static int __attribute__((warn_unused_result))
306 open_msr(int cpu, _Bool multiple_read)
307 {
308 char pathname[32];
309 int fd;
311 /*
312 * If we need to do multiple read, let's migrate to the CPU
313 * Otherwise, we would lose time calling functions on another CPU
314 *
315 * If we are not yet initialized (cpu_affinity_setsize = 0),
316 * we need to skip this optimisation.
317 */
318 if (multiple_read && cpu_affinity_setsize) {
319 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
320 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
321 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1) {
322 ERROR("Could not migrate to CPU %d", cpu);
323 return -ERR_CPU_MIGRATE;
324 }
325 }
327 ssnprintf(pathname, sizeof(pathname), "/dev/cpu/%d/msr", cpu);
328 fd = open(pathname, O_RDONLY);
329 if (fd < 0)
330 return -ERR_CANT_OPEN_MSR;
331 return fd;
332 }
334 /*
335 * Read a single MSR from an open file descriptor
336 */
337 static int __attribute__((warn_unused_result))
338 read_msr(int fd, off_t offset, unsigned long long *msr)
339 {
340 ssize_t retval;
342 retval = pread(fd, msr, sizeof *msr, offset);
344 if (retval != sizeof *msr) {
345 ERROR("MSR offset 0x%llx read failed", (unsigned long long)offset);
346 return -1;
347 }
348 return 0;
349 }
351 /*
352 * Open a MSR device for reading, read the value asked for and close it.
353 * This call will not affect the scheduling affinity of this thread.
354 */
355 static int __attribute__((warn_unused_result))
356 get_msr(int cpu, off_t offset, unsigned long long *msr)
357 {
358 ssize_t retval;
359 int fd;
361 fd = open_msr(cpu, 0);
362 if (fd < 0)
363 return fd;
364 retval = read_msr(fd, offset, msr);
365 close(fd);
366 return retval;
367 }
369 #define DELTA_WRAP32(delta, new, old) \
370 if (new > old) { \
371 delta = new - old; \
372 } else { \
373 delta = 0x100000000 + new - old; \
374 }
376 /*
377 * Extract the evolution old->new in delta at a package level
378 * (some are not new-delta, e.g. temperature)
379 */
380 static inline void
381 delta_package(struct pkg_data *delta, const struct pkg_data *new, const struct pkg_data *old)
382 {
383 delta->pc2 = new->pc2 - old->pc2;
384 delta->pc3 = new->pc3 - old->pc3;
385 delta->pc6 = new->pc6 - old->pc6;
386 delta->pc7 = new->pc7 - old->pc7;
387 delta->pc8 = new->pc8 - old->pc8;
388 delta->pc9 = new->pc9 - old->pc9;
389 delta->pc10 = new->pc10 - old->pc10;
390 delta->pkg_temp_c = new->pkg_temp_c;
392 DELTA_WRAP32(delta->energy_pkg, new->energy_pkg, old->energy_pkg);
393 DELTA_WRAP32(delta->energy_cores, new->energy_cores, old->energy_cores);
394 DELTA_WRAP32(delta->energy_gfx, new->energy_gfx, old->energy_gfx);
395 DELTA_WRAP32(delta->energy_dram, new->energy_dram, old->energy_dram);
396 DELTA_WRAP32(delta->rapl_pkg_perf_status, new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
397 DELTA_WRAP32(delta->rapl_dram_perf_status, new->rapl_dram_perf_status, old->rapl_dram_perf_status);
398 }
400 /*
401 * Extract the evolution old->new in delta at a core level
402 * (some are not new-delta, e.g. temperature)
403 */
404 static inline void
405 delta_core(struct core_data *delta, const struct core_data *new, const struct core_data *old)
406 {
407 delta->c3 = new->c3 - old->c3;
408 delta->c6 = new->c6 - old->c6;
409 delta->c7 = new->c7 - old->c7;
410 delta->core_temp_c = new->core_temp_c;
411 }
413 /*
414 * Extract the evolution old->new in delta at a package level
415 * core_delta is required for c1 estimation (tsc - c0 - all core cstates)
416 */
417 static inline int __attribute__((warn_unused_result))
418 delta_thread(struct thread_data *delta, const struct thread_data *new, const struct thread_data *old,
419 const struct core_data *core_delta)
420 {
421 delta->tsc = new->tsc - old->tsc;
423 /* check for TSC < 1 Mcycles over interval */
424 if (delta->tsc < (1000 * 1000)) {
425 WARNING("Insanely slow TSC rate, TSC stops in idle? ");
426 WARNING("You can disable all c-states by booting with \"idle=poll\" ");
427 WARNING("or just the deep ones with \"processor.max_cstate=1\"");
428 return -1;
429 }
431 delta->c1 = new->c1 - old->c1;
433 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
434 delta->aperf = new->aperf - old->aperf;
435 delta->mperf = new->mperf - old->mperf;
436 } else {
437 if (!aperf_mperf_unstable) {
438 WARNING(" APERF or MPERF went backwards * ");
439 WARNING("* Frequency results do not cover entire interval *");
440 WARNING("* fix this by running Linux-2.6.30 or later *");
442 aperf_mperf_unstable = 1;
443 }
444 }
446 /*
447 * As counter collection is not atomic,
448 * it is possible for mperf's non-halted cycles + idle states
449 * to exceed TSC's all cycles: show c1 = 0% in that case.
450 */
451 if ((delta->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > delta->tsc)
452 delta->c1 = 0;
453 else {
454 /* normal case, derive c1 */
455 delta->c1 = delta->tsc - delta->mperf - core_delta->c3
456 - core_delta->c6 - core_delta->c7;
457 }
459 if (delta->mperf == 0) {
460 WARNING("cpu%d MPERF 0!", old->cpu_id);
461 delta->mperf = 1; /* divide by 0 protection */
462 }
464 delta->smi_count = new->smi_count - old->smi_count;
466 return 0;
467 }
469 /*
470 * get_counters(...)
471 * migrate to cpu
472 * acquire and record local counters for that cpu
473 */
474 static int __attribute__((warn_unused_result))
475 get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
476 {
477 int cpu = t->cpu_id;
478 unsigned long long msr;
479 int msr_fd;
480 int retval = 0;
482 msr_fd = open_msr(cpu, 1);
483 if (msr_fd < 0)
484 return msr_fd;
486 #define READ_MSR(msr, dst) \
487 do { \
488 if (read_msr(msr_fd, msr, dst)) { \
489 retval = -ERR_##msr; \
490 goto out; \
491 } \
492 } while (0)
494 READ_MSR(MSR_IA32_TSC, &t->tsc);
496 READ_MSR(MSR_IA32_APERF, &t->aperf);
497 READ_MSR(MSR_IA32_MPERF, &t->mperf);
499 READ_MSR(MSR_SMI_COUNT, &msr);
500 t->smi_count = msr & 0xFFFFFFFF;
502 /* collect core counters only for 1st thread in core */
503 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) {
504 retval = 0;
505 goto out;
506 }
508 if (do_core_cstate & (1 << 3))
509 READ_MSR(MSR_CORE_C3_RESIDENCY, &c->c3);
510 if (do_core_cstate & (1 << 6))
511 READ_MSR(MSR_CORE_C6_RESIDENCY, &c->c6);
512 if (do_core_cstate & (1 << 7))
513 READ_MSR(MSR_CORE_C7_RESIDENCY, &c->c7);
515 if (do_dts) {
516 READ_MSR(MSR_IA32_THERM_STATUS, &msr);
517 c->core_temp_c = p->tcc_activation_temp - ((msr >> 16) & 0x7F);
518 }
520 /* collect package counters only for 1st core in package */
521 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
522 retval = 0;
523 goto out;
524 }
526 if (do_pkg_cstate & (1 << 2))
527 READ_MSR(MSR_PKG_C2_RESIDENCY, &p->pc2);
528 if (do_pkg_cstate & (1 << 3))
529 READ_MSR(MSR_PKG_C3_RESIDENCY, &p->pc3);
530 if (do_pkg_cstate & (1 << 6))
531 READ_MSR(MSR_PKG_C6_RESIDENCY, &p->pc6);
532 if (do_pkg_cstate & (1 << 7))
533 READ_MSR(MSR_PKG_C7_RESIDENCY, &p->pc7);
534 if (do_pkg_cstate & (1 << 8))
535 READ_MSR(MSR_PKG_C8_RESIDENCY, &p->pc8);
536 if (do_pkg_cstate & (1 << 9))
537 READ_MSR(MSR_PKG_C9_RESIDENCY, &p->pc9);
538 if (do_pkg_cstate & (1 << 10))
539 READ_MSR(MSR_PKG_C10_RESIDENCY, &p->pc10);
541 if (do_rapl & RAPL_PKG) {
542 READ_MSR(MSR_PKG_ENERGY_STATUS, &msr);
543 p->energy_pkg = msr & 0xFFFFFFFF;
544 }
545 if (do_rapl & RAPL_CORES) {
546 READ_MSR(MSR_PP0_ENERGY_STATUS, &msr);
547 p->energy_cores = msr & 0xFFFFFFFF;
548 }
549 if (do_rapl & RAPL_DRAM) {
550 READ_MSR(MSR_DRAM_ENERGY_STATUS, &msr);
551 p->energy_dram = msr & 0xFFFFFFFF;
552 }
553 if (do_rapl & RAPL_GFX) {
554 READ_MSR(MSR_PP1_ENERGY_STATUS, &msr);
555 p->energy_gfx = msr & 0xFFFFFFFF;
556 }
557 if (do_rapl & RAPL_PKG_PERF_STATUS) {
558 READ_MSR(MSR_PKG_PERF_STATUS, &msr);
559 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
560 }
561 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
562 READ_MSR(MSR_DRAM_PERF_STATUS, &msr);
563 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
564 }
565 if (do_ptm) {
566 READ_MSR(MSR_IA32_PACKAGE_THERM_STATUS, &msr);
567 p->pkg_temp_c = p->tcc_activation_temp - ((msr >> 16) & 0x7F);
568 }
570 out:
571 close(msr_fd);
572 return retval;
573 }
575 static void
576 free_all_buffers(void)
577 {
578 allocated = 0;
579 initialized = 0;
581 CPU_FREE(cpu_present_set);
582 cpu_present_set = NULL;
583 cpu_present_set = 0;
585 CPU_FREE(cpu_affinity_set);
586 cpu_affinity_set = NULL;
587 cpu_affinity_setsize = 0;
589 CPU_FREE(cpu_saved_affinity_set);
590 cpu_saved_affinity_set = NULL;
591 cpu_saved_affinity_setsize = 0;
593 free(thread_even);
594 free(core_even);
595 free(package_even);
597 thread_even = NULL;
598 core_even = NULL;
599 package_even = NULL;
601 free(thread_odd);
602 free(core_odd);
603 free(package_odd);
605 thread_odd = NULL;
606 core_odd = NULL;
607 package_odd = NULL;
609 free(thread_delta);
610 free(core_delta);
611 free(package_delta);
613 thread_delta = NULL;
614 core_delta = NULL;
615 package_delta = NULL;
616 }
618 /*
619 * Parse a file containing a single int.
620 */
621 static int __attribute__ ((format(printf,1,2)))
622 parse_int_file(const char *fmt, ...)
623 {
624 va_list args;
625 char path[PATH_MAX];
626 FILE *filep;
627 int value;
629 va_start(args, fmt);
630 vsnprintf(path, sizeof(path), fmt, args);
631 va_end(args);
632 filep = fopen(path, "r");
633 if (!filep) {
634 ERROR("%s: open failed", path);
635 return -ERR_CANT_OPEN_FILE;
636 }
637 if (fscanf(filep, "%d", &value) != 1) {
638 ERROR("%s: failed to parse number from file", path);
639 return -ERR_CANT_READ_NUMBER;
640 }
641 fclose(filep);
642 return value;
643 }
645 /*
646 * cpu_is_first_sibling_in_core(cpu)
647 * return 1 if given CPU is 1st HT sibling in the core
648 */
649 static int
650 cpu_is_first_sibling_in_core(int cpu)
651 {
652 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
653 }
655 /*
656 * cpu_is_first_core_in_package(cpu)
657 * return 1 if given CPU is 1st core in package
658 */
659 static int
660 cpu_is_first_core_in_package(int cpu)
661 {
662 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
663 }
665 static int
666 get_physical_package_id(int cpu)
667 {
668 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
669 }
671 static int
672 get_core_id(int cpu)
673 {
674 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
675 }
677 static int
678 get_num_ht_siblings(int cpu)
679 {
680 char path[80];
681 FILE *filep;
682 int sib1, sib2;
683 int matches;
684 char character;
686 ssnprintf(path, sizeof(path), "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
687 filep = fopen(path, "r");
688 if (!filep) {
689 ERROR("%s: open failed", path);
690 return -ERR_CANT_OPEN_FILE;
691 }
692 /*
693 * file format:
694 * if a pair of number with a character between: 2 siblings (eg. 1-2, or 1,4)
695 * otherwinse 1 sibling (self).
696 */
697 matches = fscanf(filep, "%d%c%d\n", &sib1, &character, &sib2);
699 fclose(filep);
701 if (matches == 3)
702 return 2;
703 else
704 return 1;
705 }
707 /*
708 * Extract every data evolution for all CPU
709 *
710 * Core data is shared for all threads in one core: extracted only for the first thread
711 * Package data is shared for all core in one package: extracted only for the first thread of the first core
712 */
713 static int __attribute__((warn_unused_result))
714 for_all_cpus_delta(const struct thread_data *thread_new_base, const struct core_data *core_new_base, const struct pkg_data *pkg_new_base,
715 const struct thread_data *thread_old_base, const struct core_data *core_old_base, const struct pkg_data *pkg_old_base)
716 {
717 int retval, pkg_no, core_no, thread_no;
719 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
720 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
721 for (thread_no = 0; thread_no <
722 topo.num_threads_per_core; ++thread_no) {
723 struct thread_data *t_delta;
724 const struct thread_data *t_old, *t_new;
725 struct core_data *c_delta;
727 /* Get correct pointers for threads */
728 t_delta = GET_THREAD(thread_delta, thread_no, core_no, pkg_no);
729 t_new = GET_THREAD(thread_new_base, thread_no, core_no, pkg_no);
730 t_old = GET_THREAD(thread_old_base, thread_no, core_no, pkg_no);
732 /* Skip threads that disappeared */
733 if (cpu_is_not_present(t_delta->cpu_id))
734 continue;
736 /* c_delta is always required for delta_thread */
737 c_delta = GET_CORE(core_delta, core_no, pkg_no);
739 /* calculate core delta only for 1st thread in core */
740 if (t_new->flags & CPU_IS_FIRST_THREAD_IN_CORE) {
741 const struct core_data *c_old, *c_new;
743 c_new = GET_CORE(core_new_base, core_no, pkg_no);
744 c_old = GET_CORE(core_old_base, core_no, pkg_no);
746 delta_core(c_delta, c_new, c_old);
747 }
749 /* Always calculate thread delta */
750 retval = delta_thread(t_delta, t_new, t_old, c_delta);
751 if (retval)
752 return retval;
754 /* calculate package delta only for 1st core in package */
755 if (t_new->flags & CPU_IS_FIRST_CORE_IN_PACKAGE) {
756 struct pkg_data *p_delta;
757 const struct pkg_data *p_old, *p_new;
759 p_delta = GET_PKG(package_delta, pkg_no);
760 p_new = GET_PKG(pkg_new_base, pkg_no);
761 p_old = GET_PKG(pkg_old_base, pkg_no);
763 delta_package(p_delta, p_new, p_old);
764 }
765 }
766 }
767 }
768 return 0;
769 }
771 /*
772 * run func(cpu) on every cpu in /proc/stat
773 * return max_cpu number
774 */
775 static int __attribute__((warn_unused_result))
776 for_all_proc_cpus(int (func)(int))
777 {
778 FILE *fp;
779 int cpu_num;
780 int retval;
782 fp = fopen("/proc/stat", "r");
783 if (!fp) {
784 ERROR("Failed to open /proc/stat");
785 return -ERR_CANT_OPEN_FILE;
786 }
788 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
789 if (retval != 0) {
790 ERROR("Failed to parse /proc/stat");
791 fclose(fp);
792 return -ERR_CANT_READ_PROC_STAT;
793 }
795 while (1) {
796 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
797 if (retval != 1)
798 break;
800 retval = func(cpu_num);
801 if (retval) {
802 fclose(fp);
803 return(retval);
804 }
805 }
806 fclose(fp);
807 return 0;
808 }
810 /*
811 * count_cpus()
812 * remember the last one seen, it will be the max
813 */
814 static int
815 count_cpus(int cpu)
816 {
817 if (topo.max_cpu_num < cpu)
818 topo.max_cpu_num = cpu;
820 topo.num_cpus += 1;
821 return 0;
822 }
823 static int
824 mark_cpu_present(int cpu)
825 {
826 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
827 return 0;
828 }
831 static void
832 turbostat_submit (const char *plugin_instance,
833 const char *type, const char *type_instance,
834 gauge_t value)
835 {
836 value_list_t vl = VALUE_LIST_INIT;
837 value_t v;
839 v.gauge = value;
840 vl.values = &v;
841 vl.values_len = 1;
842 sstrncpy (vl.host, hostname_g, sizeof (vl.host));
843 sstrncpy (vl.plugin, PLUGIN_NAME, sizeof (vl.plugin));
844 if (plugin_instance != NULL)
845 sstrncpy (vl.plugin_instance, plugin_instance, sizeof (vl.plugin_instance));
846 sstrncpy (vl.type, type, sizeof (vl.type));
847 if (type_instance != NULL)
848 sstrncpy (vl.type_instance, type_instance, sizeof (vl.type_instance));
850 plugin_dispatch_values (&vl);
851 }
853 /*
854 * column formatting convention & formats
855 * package: "pk" 2 columns %2d
856 * core: "cor" 3 columns %3d
857 * CPU: "CPU" 3 columns %3d
858 * Pkg_W: %6.2
859 * Cor_W: %6.2
860 * GFX_W: %5.2
861 * RAM_W: %5.2
862 * GHz: "GHz" 3 columns %3.2
863 * TSC: "TSC" 3 columns %3.2
864 * SMI: "SMI" 4 columns %4d
865 * percentage " %pc3" %6.2
866 * Perf Status percentage: %5.2
867 * "CTMP" 4 columns %4d
868 */
869 static int
870 submit_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
871 {
872 char name[12];
873 double interval_float;
875 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
877 ssnprintf(name, sizeof(name), "cpu%02d", t->cpu_id);
879 if (!aperf_mperf_unstable)
880 turbostat_submit(name, "percent", "c0", 100.0 * t->mperf/t->tsc);
881 if (!aperf_mperf_unstable)
882 turbostat_submit(name, "percent", "c1", 100.0 * t->c1/t->tsc);
884 /* GHz */
885 if ((!aperf_mperf_unstable) || (!(t->aperf > t->tsc || t->mperf > t->tsc)))
886 turbostat_submit(NULL, "frequency", name, 1.0 * t->tsc / 1000000000 * t->aperf / t->mperf / interval_float);
888 /* SMI */
889 turbostat_submit(NULL, "current", name, t->smi_count);
891 /* print per-core data only for 1st thread in core */
892 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
893 goto done;
895 ssnprintf(name, sizeof(name), "core%02d", c->core_id);
897 if (do_core_cstate & (1 << 3))
898 turbostat_submit(name, "percent", "c3", 100.0 * c->c3/t->tsc);
899 if (do_core_cstate & (1 << 6))
900 turbostat_submit(name, "percent", "c6", 100.0 * c->c6/t->tsc);
901 if (do_core_cstate & (1 << 7))
902 turbostat_submit(name, "percent", "c7", 100.0 * c->c7/t->tsc);
904 if (do_dts)
905 turbostat_submit(NULL, "temperature", name, c->core_temp_c);
907 /* print per-package data only for 1st core in package */
908 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
909 goto done;
911 ssnprintf(name, sizeof(name), "pkg%02d", p->package_id);
913 if (do_ptm)
914 turbostat_submit(NULL, "temperature", name, p->pkg_temp_c);
916 if (do_pkg_cstate & (1 << 2))
917 turbostat_submit(name, "percent", "pc2", 100.0 * p->pc2/t->tsc);
918 if (do_pkg_cstate & (1 << 3))
919 turbostat_submit(name, "percent", "pc3", 100.0 * p->pc3/t->tsc);
920 if (do_pkg_cstate & (1 << 6))
921 turbostat_submit(name, "percent", "pc6", 100.0 * p->pc6/t->tsc);
922 if (do_pkg_cstate & (1 << 7))
923 turbostat_submit(name, "percent", "pc7", 100.0 * p->pc7/t->tsc);
924 if (do_pkg_cstate & (1 << 8))
925 turbostat_submit(name, "percent", "pc8", 100.0 * p->pc8/t->tsc);
926 if (do_pkg_cstate & (1 << 9))
927 turbostat_submit(name, "percent", "pc9", 100.0 * p->pc9/t->tsc);
928 if (do_pkg_cstate & (1 << 10))
929 turbostat_submit(name, "percent", "pc10", 100.0 * p->pc10/t->tsc);
931 if (do_rapl) {
932 if (do_rapl & RAPL_PKG)
933 turbostat_submit(name, "power", "Pkg_W", p->energy_pkg * rapl_energy_units / interval_float);
934 if (do_rapl & RAPL_CORES)
935 turbostat_submit(name, "power", "Cor_W", p->energy_cores * rapl_energy_units / interval_float);
936 if (do_rapl & RAPL_GFX)
937 turbostat_submit(name, "power", "GFX_W", p->energy_gfx * rapl_energy_units / interval_float);
938 if (do_rapl & RAPL_DRAM)
939 turbostat_submit(name, "power", "RAM_W", p->energy_dram * rapl_energy_units / interval_float);
940 }
941 done:
942 return 0;
943 }
945 static int
946 turbostat_read(user_data_t * not_used)
947 {
948 int ret;
950 if (!allocated) {
951 if ((ret = setup_all_buffers()) < 0)
952 return ret;
953 }
955 if (for_all_proc_cpus(cpu_is_not_present)) {
956 free_all_buffers();
957 if ((ret = setup_all_buffers()) < 0)
958 return ret;
959 if (for_all_proc_cpus(cpu_is_not_present))
960 return -ERR_CPU_NOT_PRESENT;
961 }
963 /* Saving the scheduling affinity, as it will be modified by get_counters */
964 if (sched_getaffinity(0, cpu_saved_affinity_setsize, cpu_saved_affinity_set) != 0)
965 return -ERR_CPU_SAVE_SCHED_AFFINITY;
967 if (!initialized) {
968 if ((ret = for_all_cpus(get_counters, EVEN_COUNTERS)) < 0)
969 goto out;
970 gettimeofday(&tv_even, (struct timezone *)NULL);
971 is_even = 1;
972 initialized = 1;
973 ret = 0;
974 goto out;
975 }
977 if (is_even) {
978 if ((ret = for_all_cpus(get_counters, ODD_COUNTERS)) < 0)
979 goto out;
980 gettimeofday(&tv_odd, (struct timezone *)NULL);
981 is_even = 0;
982 timersub(&tv_odd, &tv_even, &tv_delta);
983 if ((ret = for_all_cpus_delta(ODD_COUNTERS, EVEN_COUNTERS)) < 0)
984 goto out;
985 if ((ret = for_all_cpus(submit_counters, DELTA_COUNTERS)) < 0)
986 goto out;
987 } else {
988 if ((ret = for_all_cpus(get_counters, EVEN_COUNTERS)) < 0)
989 goto out;
990 gettimeofday(&tv_even, (struct timezone *)NULL);
991 is_even = 1;
992 timersub(&tv_even, &tv_odd, &tv_delta);
993 if ((ret = for_all_cpus_delta(EVEN_COUNTERS, ODD_COUNTERS)) < 0)
994 goto out;
995 if ((ret = for_all_cpus(submit_counters, DELTA_COUNTERS)) < 0)
996 goto out;
997 }
998 ret = 0;
999 out:
1000 /*
1001 * Let's restore the affinity
1002 * This might fail if the number of CPU changed, but we can't do anything in that case..
1003 */
1004 (void)sched_setaffinity(0, cpu_saved_affinity_setsize, cpu_saved_affinity_set);
1005 return ret;
1006 }
1008 static int __attribute__((warn_unused_result))
1009 check_dev_msr()
1010 {
1011 struct stat sb;
1013 if (stat("/dev/cpu/0/msr", &sb)) {
1014 ERROR("no /dev/cpu/0/msr, try \"# modprobe msr\"");
1015 return -ERR_NO_MSR;
1016 }
1017 return 0;
1018 }
1020 static int __attribute__((warn_unused_result))
1021 check_super_user()
1022 {
1023 if (getuid() != 0) {
1024 ERROR("must be root");
1025 return -ERR_NOT_ROOT;
1026 }
1027 return 0;
1028 }
1030 /*
1031 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
1032 * the Thermal Control Circuit (TCC) activates.
1033 * This is usually equal to tjMax.
1034 *
1035 * Older processors do not have this MSR, so there we guess,
1036 * but also allow conficuration over-ride with "TCCActivationTemp".
1037 *
1038 * Several MSR temperature values are in units of degrees-C
1039 * below this value, including the Digital Thermal Sensor (DTS),
1040 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
1041 */
1042 static int __attribute__((warn_unused_result))
1043 set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1044 {
1045 unsigned long long msr;
1046 unsigned int target_c_local;
1048 /* tcc_activation_temp is used only for dts or ptm */
1049 if (!(do_dts || do_ptm))
1050 return 0;
1052 /* this is a per-package concept */
1053 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1054 return 0;
1056 if (tcc_activation_temp != 0) {
1057 p->tcc_activation_temp = tcc_activation_temp;
1058 return 0;
1059 }
1061 if (get_msr(t->cpu_id, MSR_IA32_TEMPERATURE_TARGET, &msr))
1062 goto guess;
1064 target_c_local = (msr >> 16) & 0xFF;
1066 if (!target_c_local)
1067 goto guess;
1069 p->tcc_activation_temp = target_c_local;
1071 return 0;
1073 guess:
1074 p->tcc_activation_temp = TJMAX_DEFAULT;
1075 WARNING("cpu%d: Guessing tjMax %d C, Please use TCCActivationTemp to specify",
1076 t->cpu_id, p->tcc_activation_temp);
1078 return 0;
1079 }
1081 /*
1082 * Identify the functionality of the CPU
1083 */
1084 static int __attribute__((warn_unused_result))
1085 probe_cpu()
1086 {
1087 unsigned int eax, ebx, ecx, edx, max_level;
1088 unsigned int fms, family, model;
1090 /* CPUID(0):
1091 * - EAX: Maximum Input Value for Basic CPUID Information
1092 * - EBX: "Genu" (0x756e6547)
1093 * - EDX: "ineI" (0x49656e69)
1094 * - ECX: "ntel" (0x6c65746e)
1095 */
1096 max_level = ebx = ecx = edx = 0;
1097 __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
1098 if (ebx != 0x756e6547 && edx != 0x49656e69 && ecx != 0x6c65746e) {
1099 ERROR("Unsupported CPU");
1100 return -UNSUPPORTED_CPU;
1101 }
1103 /* CPUID(1):
1104 * - EAX: Version Information: Type, Family, Model, and Stepping ID
1105 * + 4-7: Model ID
1106 * + 8-11: Family ID
1107 * + 12-13: Processor type
1108 * + 16-19: Extended Model ID
1109 * + 20-27: Extended Family ID
1110 * - EDX: Feature Information:
1111 * + 5: Support for MSR read/write operations
1112 */
1113 fms = ebx = ecx = edx = 0;
1114 __get_cpuid(1, &fms, &ebx, &ecx, &edx);
1115 family = (fms >> 8) & 0xf;
1116 model = (fms >> 4) & 0xf;
1117 if (family == 0xf)
1118 family += (fms >> 20) & 0xf;
1119 if (family == 6 || family == 0xf)
1120 model += ((fms >> 16) & 0xf) << 4;
1121 if (!(edx & (1 << 5))) {
1122 ERROR("CPUID: no MSR");
1123 return -ERR_NO_MSR;
1124 }
1126 /*
1127 * CPUID(0x80000000):
1128 * - EAX: Maximum Input Value for Extended Function CPUID Information
1129 *
1130 * This allows us to verify if the CPUID(0x80000007) can be called
1131 *
1132 * This check is valid for both Intel and AMD.
1133 */
1134 max_level = ebx = ecx = edx = 0;
1135 __get_cpuid(0x80000000, &max_level, &ebx, &ecx, &edx);
1136 if (max_level < 0x80000007) {
1137 ERROR("CPUID: no invariant TSC (max_level 0x%x)", max_level);
1138 return -ERR_NO_INVARIANT_TSC;
1139 }
1141 /*
1142 * CPUID(0x80000007):
1143 * - EDX:
1144 * + 8: Invariant TSC available if set
1145 *
1146 * This check is valid for both Intel and AMD
1147 */
1148 __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
1149 if (!(edx & (1 << 8))) {
1150 ERROR("No invariant TSC");
1151 return -ERR_NO_INVARIANT_TSC;
1152 }
1154 /*
1155 * CPUID(6):
1156 * - EAX:
1157 * + 0: Digital temperature sensor is supported if set
1158 * + 6: Package thermal management is supported if set
1159 * - ECX:
1160 * + 0: Hardware Coordination Feedback Capability (Presence of IA32_MPERF and IA32_APERF).
1161 * + 3: The processor supports performance-energy bias preference if set.
1162 * It also implies the presence of a new architectural MSR called IA32_ENERGY_PERF_BIAS
1163 *
1164 * This check is valid for both Intel and AMD
1165 */
1166 __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
1167 do_dts = eax & (1 << 0);
1168 do_ptm = eax & (1 << 6);
1169 if (!(ecx & (1 << 0))) {
1170 ERROR("No APERF");
1171 return -ERR_NO_APERF;
1172 }
1174 /*
1175 * Enable or disable C states depending on the model and family
1176 */
1177 if (family == 6) {
1178 switch (model) {
1179 /* Atom (partial) */
1180 case 0x27:
1181 do_core_cstate = 0;
1182 do_pkg_cstate = (1 << 2) | (1 << 4) | (1 << 6);
1183 break;
1184 /* Silvermont */
1185 case 0x37: /* BYT */
1186 case 0x4A:
1187 case 0x4D: /* AVN */
1188 case 0x5A:
1189 case 0x5D:
1190 do_core_cstate = (1 << 1) | (1 << 6);
1191 do_pkg_cstate = (1 << 6);
1192 break;
1193 /* Nehalem */
1194 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
1195 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
1196 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
1197 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1198 do_core_cstate = (1 << 3) | (1 << 6);
1199 do_pkg_cstate = (1 << 3) | (1 << 6) | (1 << 7);
1200 break;
1201 /* Westmere */
1202 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
1203 case 0x2C: /* Westmere EP - Gulftown */
1204 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1205 do_core_cstate = (1 << 3) | (1 << 6);
1206 do_pkg_cstate = (1 << 3) | (1 << 6) | (1 << 7);
1207 break;
1208 /* Sandy Bridge */
1209 case 0x2A: /* SNB */
1210 case 0x2D: /* SNB Xeon */
1211 do_core_cstate = (1 << 3) | (1 << 6) | (1 << 7);
1212 do_pkg_cstate = (1 << 2) | (1 << 3) | (1 << 6) | (1 << 7);
1213 break;
1214 /* Ivy Bridge */
1215 case 0x3A: /* IVB */
1216 case 0x3E: /* IVB Xeon */
1217 do_core_cstate = (1 << 3) | (1 << 6) | (1 << 7);
1218 do_pkg_cstate = (1 << 2) | (1 << 3) | (1 << 6) | (1 << 7);
1219 break;
1220 /* Haswell Bridge */
1221 case 0x3C: /* HSW */
1222 case 0x3F: /* HSW */
1223 case 0x46: /* HSW */
1224 do_core_cstate = (1 << 3) | (1 << 6) | (1 << 7);
1225 do_pkg_cstate = (1 << 2) | (1 << 3) | (1 << 6) | (1 << 7);
1226 break;
1227 case 0x45: /* HSW */
1228 do_core_cstate = (1 << 3) | (1 << 6) | (1 << 7);
1229 do_pkg_cstate = (1 << 2) | (1 << 3) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10);
1230 break;
1231 /* Broadwel */
1232 case 0x4F: /* BDW */
1233 case 0x56: /* BDX-DE */
1234 do_core_cstate = (1 << 3) | (1 << 6) | (1 << 7);
1235 do_pkg_cstate = (1 << 2) | (1 << 3) | (1 << 6) | (1 << 7);
1236 break;
1237 case 0x3D: /* BDW */
1238 do_core_cstate = (1 << 3) | (1 << 6) | (1 << 7);
1239 do_pkg_cstate = (1 << 2) | (1 << 3) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10);
1240 break;
1241 default:
1242 ERROR("Unsupported CPU");
1243 }
1244 switch (model) {
1245 case 0x2A:
1246 case 0x3A:
1247 case 0x3C:
1248 case 0x45:
1249 case 0x46:
1250 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_PKG_POWER_INFO | RAPL_GFX;
1251 break;
1252 case 0x3F:
1253 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM | RAPL_DRAM_PERF_STATUS;
1254 break;
1255 case 0x2D:
1256 case 0x3E:
1257 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_PKG_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM | RAPL_DRAM_PERF_STATUS;
1258 break;
1259 case 0x37:
1260 case 0x4D:
1261 do_rapl = RAPL_PKG | RAPL_CORES;
1262 break;
1263 default:
1264 do_rapl = 0;
1265 }
1266 } else {
1267 ERROR("Unsupported CPU");
1268 return -UNSUPPORTED_CPU;
1269 }
1271 if (do_rapl) {
1272 unsigned long msr;
1273 if (get_msr(0, MSR_RAPL_POWER_UNIT, &msr))
1274 return 0;
1276 if (model == 0x37)
1277 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
1278 else
1279 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
1280 }
1282 return 0;
1283 }
1287 static int __attribute__((warn_unused_result))
1288 topology_probe()
1289 {
1290 int i;
1291 int ret;
1292 int max_core_id = 0;
1293 int max_package_id = 0;
1294 int max_siblings = 0;
1295 struct cpu_topology {
1296 int core_id;
1297 int physical_package_id;
1298 } *cpus;
1300 /* Initialize num_cpus, max_cpu_num */
1301 topo.num_cpus = 0;
1302 topo.max_cpu_num = 0;
1303 ret = for_all_proc_cpus(count_cpus);
1304 if (ret < 0)
1305 return ret;
1307 DEBUG("num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
1309 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
1310 if (cpus == NULL) {
1311 ERROR("calloc cpus");
1312 return -ERR_CALLOC;
1313 }
1315 /*
1316 * Allocate and initialize cpu_present_set
1317 */
1318 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
1319 if (cpu_present_set == NULL) {
1320 free(cpus);
1321 ERROR("CPU_ALLOC");
1322 return -ERR_CPU_ALLOC;
1323 }
1324 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
1325 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
1326 ret = for_all_proc_cpus(mark_cpu_present);
1327 if (ret < 0) {
1328 free(cpus);
1329 return ret;
1330 }
1332 /*
1333 * Allocate and initialize cpu_affinity_set
1334 */
1335 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
1336 if (cpu_affinity_set == NULL) {
1337 free(cpus);
1338 ERROR("CPU_ALLOC");
1339 return -ERR_CPU_ALLOC;
1340 }
1341 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
1342 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
1345 /*
1346 * Allocate and initialize cpu_saved_affinity_set
1347 */
1348 cpu_saved_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
1349 if (cpu_saved_affinity_set == NULL) {
1350 free(cpus);
1351 ERROR("CPU_ALLOC");
1352 return -ERR_CPU_ALLOC;
1353 }
1354 cpu_saved_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
1355 CPU_ZERO_S(cpu_saved_affinity_setsize, cpu_saved_affinity_set);
1358 /*
1359 * For online cpus
1360 * find max_core_id, max_package_id
1361 */
1362 for (i = 0; i <= topo.max_cpu_num; ++i) {
1363 int siblings;
1365 if (cpu_is_not_present(i)) {
1366 WARNING("cpu%d NOT PRESENT", i);
1367 continue;
1368 }
1369 cpus[i].core_id = get_core_id(i);
1370 if (cpus[i].core_id < 0)
1371 return cpus[i].core_id;
1372 if (cpus[i].core_id > max_core_id)
1373 max_core_id = cpus[i].core_id;
1375 cpus[i].physical_package_id = get_physical_package_id(i);
1376 if (cpus[i].physical_package_id < 0)
1377 return cpus[i].physical_package_id;
1378 if (cpus[i].physical_package_id > max_package_id)
1379 max_package_id = cpus[i].physical_package_id;
1381 siblings = get_num_ht_siblings(i);
1382 if (siblings < 0)
1383 return siblings;
1384 if (siblings > max_siblings)
1385 max_siblings = siblings;
1386 DEBUG("cpu %d pkg %d core %d\n",
1387 i, cpus[i].physical_package_id, cpus[i].core_id);
1388 }
1389 topo.num_cores_per_pkg = max_core_id + 1;
1390 DEBUG("max_core_id %d, sizing for %d cores per package\n",
1391 max_core_id, topo.num_cores_per_pkg);
1393 topo.num_packages = max_package_id + 1;
1394 DEBUG("max_package_id %d, sizing for %d packages\n",
1395 max_package_id, topo.num_packages);
1397 topo.num_threads_per_core = max_siblings;
1398 DEBUG("max_siblings %d\n", max_siblings);
1400 free(cpus);
1401 return 0;
1402 }
1404 static int
1405 allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
1406 {
1407 int i;
1409 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
1410 topo.num_packages, sizeof(struct thread_data));
1411 if (*t == NULL)
1412 goto error;
1414 for (i = 0; i < topo.num_threads_per_core *
1415 topo.num_cores_per_pkg * topo.num_packages; i++)
1416 (*t)[i].cpu_id = -1;
1418 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
1419 sizeof(struct core_data));
1420 if (*c == NULL)
1421 goto error;
1423 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
1424 (*c)[i].core_id = -1;
1426 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
1427 if (*p == NULL)
1428 goto error;
1430 for (i = 0; i < topo.num_packages; i++)
1431 (*p)[i].package_id = i;
1433 return 0;
1434 error:
1435 ERROR("calloc counters");
1436 return -ERR_CALLOC;
1437 }
1438 /*
1439 * init_counter()
1440 *
1441 * set cpu_id, core_num, pkg_num
1442 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
1443 *
1444 * increment topo.num_cores when 1st core in pkg seen
1445 */
1446 static int
1447 init_counter(struct thread_data *thread_base, struct core_data *core_base,
1448 struct pkg_data *pkg_base, int thread_num, int core_num,
1449 int pkg_num, int cpu_id)
1450 {
1451 int ret;
1452 struct thread_data *t;
1453 struct core_data *c;
1454 struct pkg_data *p;
1456 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
1457 c = GET_CORE(core_base, core_num, pkg_num);
1458 p = GET_PKG(pkg_base, pkg_num);
1460 t->cpu_id = cpu_id;
1461 if (thread_num == 0) {
1462 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
1463 if ((ret = cpu_is_first_core_in_package(cpu_id)) < 0) {
1464 return ret;
1465 } else if (ret != 0) {
1466 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
1467 }
1468 }
1470 c->core_id = core_num;
1471 p->package_id = pkg_num;
1473 return 0;
1474 }
1477 static int
1478 initialize_counters(int cpu_id)
1479 {
1480 int my_thread_id, my_core_id, my_package_id;
1481 int ret;
1483 my_package_id = get_physical_package_id(cpu_id);
1484 if (my_package_id < 0)
1485 return my_package_id;
1486 my_core_id = get_core_id(cpu_id);
1487 if (my_core_id < 0)
1488 return my_core_id;
1490 if ((ret = cpu_is_first_sibling_in_core(cpu_id)) < 0) {
1491 return ret;
1492 } else if (ret != 0) {
1493 my_thread_id = 0;
1494 topo.num_cores++;
1495 } else {
1496 my_thread_id = 1;
1497 }
1499 ret = init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
1500 if (ret < 0)
1501 return ret;
1502 ret = init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
1503 if (ret < 0)
1504 return ret;
1505 ret = init_counter(DELTA_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
1506 if (ret < 0)
1507 return ret;
1508 return 0;
1509 }
1511 #define DO_OR_GOTO_ERR(something) \
1512 do { \
1513 ret = (something); \
1514 if (ret < 0) \
1515 goto err; \
1516 } while (0)
1518 static int setup_all_buffers(void)
1519 {
1520 int ret;
1522 DO_OR_GOTO_ERR(topology_probe());
1523 DO_OR_GOTO_ERR(allocate_counters(&thread_even, &core_even, &package_even));
1524 DO_OR_GOTO_ERR(allocate_counters(&thread_odd, &core_odd, &package_odd));
1525 DO_OR_GOTO_ERR(allocate_counters(&thread_delta, &core_delta, &package_delta));
1526 DO_OR_GOTO_ERR(for_all_proc_cpus(initialize_counters));
1527 DO_OR_GOTO_ERR(for_all_cpus(set_temperature_target, EVEN_COUNTERS));
1528 DO_OR_GOTO_ERR(for_all_cpus(set_temperature_target, ODD_COUNTERS));
1530 allocated = 1;
1531 return 0;
1532 err:
1533 free_all_buffers();
1534 return ret;
1535 }
1537 static int
1538 turbostat_init(void)
1539 {
1540 int ret;
1542 DO_OR_GOTO_ERR(check_super_user());
1543 DO_OR_GOTO_ERR(probe_cpu());
1544 DO_OR_GOTO_ERR(check_dev_msr());
1545 DO_OR_GOTO_ERR(setup_all_buffers());
1547 plugin_register_complex_read(NULL, PLUGIN_NAME, turbostat_read, NULL, NULL);
1549 return 0;
1550 err:
1551 free_all_buffers();
1552 return ret;
1553 }
1555 static const char *config_keys[] =
1556 {
1557 "TCCActivationTemp",
1558 };
1559 static const int config_keys_num = STATIC_ARRAY_SIZE (config_keys);
1561 static int
1562 turbostat_config(const char *key, const char *value)
1563 {
1564 long unsigned int tmp_val;
1565 char *end;
1567 if (strcasecmp("TCCActivationTemp", key) == 0) {
1568 tmp_val = strtoul(value, &end, 0);
1569 if (*end != '\0' || tmp_val > UINT_MAX)
1570 return -1;
1571 tcc_activation_temp = (unsigned int) tmp_val;
1572 } else {
1573 return -1;
1574 }
1575 return 0;
1576 }
1578 void module_register(void);
1579 void module_register(void)
1580 {
1581 plugin_register_init(PLUGIN_NAME, turbostat_init);
1582 plugin_register_config(PLUGIN_NAME, turbostat_config, config_keys, config_keys_num);
1583 }