1 /**
2 * collectd - src/intel_pmu.c
3 *
4 * Copyright(c) 2017 Intel Corporation. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Serhiy Pshyk <serhiyx.pshyk@intel.com>
26 **/
28 #include "collectd.h"
29 #include "common.h"
31 #include <jevents.h>
32 #include <jsession.h>
34 #define PMU_PLUGIN "intel_pmu"
36 #define HW_CACHE_READ_ACCESS \
37 (((PERF_COUNT_HW_CACHE_OP_READ) << 8) | \
38 ((PERF_COUNT_HW_CACHE_RESULT_ACCESS) << 16))
40 #define HW_CACHE_WRITE_ACCESS \
41 (((PERF_COUNT_HW_CACHE_OP_WRITE) << 8) | \
42 ((PERF_COUNT_HW_CACHE_RESULT_ACCESS) << 16))
44 #define HW_CACHE_PREFETCH_ACCESS \
45 (((PERF_COUNT_HW_CACHE_OP_PREFETCH) << 8) | \
46 ((PERF_COUNT_HW_CACHE_RESULT_ACCESS) << 16))
48 #define HW_CACHE_READ_MISS \
49 (((PERF_COUNT_HW_CACHE_OP_READ) << 8) | \
50 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))
52 #define HW_CACHE_WRITE_MISS \
53 (((PERF_COUNT_HW_CACHE_OP_WRITE) << 8) | \
54 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))
56 #define HW_CACHE_PREFETCH_MISS \
57 (((PERF_COUNT_HW_CACHE_OP_PREFETCH) << 8) | \
58 ((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))
60 struct event_info {
61 char *name;
62 uint64_t config;
63 };
64 typedef struct event_info event_info_t;
66 struct intel_pmu_ctx_s {
67 _Bool hw_cache_events;
68 _Bool kernel_pmu_events;
69 _Bool sw_events;
70 char event_list_fn[PATH_MAX];
71 char **hw_events;
72 size_t hw_events_count;
73 struct eventlist *event_list;
74 };
75 typedef struct intel_pmu_ctx_s intel_pmu_ctx_t;
77 event_info_t g_kernel_pmu_events[] = {
78 {.name = "cpu-cycles", .config = PERF_COUNT_HW_CPU_CYCLES},
79 {.name = "instructions", .config = PERF_COUNT_HW_INSTRUCTIONS},
80 {.name = "cache-references", .config = PERF_COUNT_HW_CACHE_REFERENCES},
81 {.name = "cache-misses", .config = PERF_COUNT_HW_CACHE_MISSES},
82 {.name = "branches", .config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS},
83 {.name = "branch-misses", .config = PERF_COUNT_HW_BRANCH_MISSES},
84 {.name = "bus-cycles", .config = PERF_COUNT_HW_BUS_CYCLES},
85 };
87 event_info_t g_hw_cache_events[] = {
89 {.name = "L1-dcache-loads",
90 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_READ_ACCESS)},
91 {.name = "L1-dcache-load-misses",
92 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_READ_MISS)},
93 {.name = "L1-dcache-stores",
94 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_WRITE_ACCESS)},
95 {.name = "L1-dcache-store-misses",
96 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_WRITE_MISS)},
97 {.name = "L1-dcache-prefetches",
98 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_PREFETCH_ACCESS)},
99 {.name = "L1-dcache-prefetch-misses",
100 .config = (PERF_COUNT_HW_CACHE_L1D | HW_CACHE_PREFETCH_MISS)},
102 {.name = "L1-icache-loads",
103 .config = (PERF_COUNT_HW_CACHE_L1I | HW_CACHE_READ_ACCESS)},
104 {.name = "L1-icache-load-misses",
105 .config = (PERF_COUNT_HW_CACHE_L1I | HW_CACHE_READ_MISS)},
106 {.name = "L1-icache-prefetches",
107 .config = (PERF_COUNT_HW_CACHE_L1I | HW_CACHE_PREFETCH_ACCESS)},
108 {.name = "L1-icache-prefetch-misses",
109 .config = (PERF_COUNT_HW_CACHE_L1I | HW_CACHE_PREFETCH_MISS)},
111 {.name = "LLC-loads",
112 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_READ_ACCESS)},
113 {.name = "LLC-load-misses",
114 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_READ_MISS)},
115 {.name = "LLC-stores",
116 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_WRITE_ACCESS)},
117 {.name = "LLC-store-misses",
118 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_WRITE_MISS)},
119 {.name = "LLC-prefetches",
120 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_PREFETCH_ACCESS)},
121 {.name = "LLC-prefetch-misses",
122 .config = (PERF_COUNT_HW_CACHE_LL | HW_CACHE_PREFETCH_MISS)},
124 {.name = "dTLB-loads",
125 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_READ_ACCESS)},
126 {.name = "dTLB-load-misses",
127 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_READ_MISS)},
128 {.name = "dTLB-stores",
129 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_WRITE_ACCESS)},
130 {.name = "dTLB-store-misses",
131 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_WRITE_MISS)},
132 {.name = "dTLB-prefetches",
133 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_PREFETCH_ACCESS)},
134 {.name = "dTLB-prefetch-misses",
135 .config = (PERF_COUNT_HW_CACHE_DTLB | HW_CACHE_PREFETCH_MISS)},
137 {.name = "iTLB-loads",
138 .config = (PERF_COUNT_HW_CACHE_ITLB | HW_CACHE_READ_ACCESS)},
139 {.name = "iTLB-load-misses",
140 .config = (PERF_COUNT_HW_CACHE_ITLB | HW_CACHE_READ_MISS)},
142 {.name = "branch-loads",
143 .config = (PERF_COUNT_HW_CACHE_BPU | HW_CACHE_READ_ACCESS)},
144 {.name = "branch-load-misses",
145 .config = (PERF_COUNT_HW_CACHE_BPU | HW_CACHE_READ_MISS)},
146 };
148 event_info_t g_sw_events[] = {
149 {.name = "cpu-clock", .config = PERF_COUNT_SW_CPU_CLOCK},
151 {.name = "task-clock", .config = PERF_COUNT_SW_TASK_CLOCK},
153 {.name = "context-switches", .config = PERF_COUNT_SW_CONTEXT_SWITCHES},
155 {.name = "cpu-migrations", .config = PERF_COUNT_SW_CPU_MIGRATIONS},
157 {.name = "page-faults", .config = PERF_COUNT_SW_PAGE_FAULTS},
159 {.name = "minor-faults", .config = PERF_COUNT_SW_PAGE_FAULTS_MIN},
161 {.name = "major-faults", .config = PERF_COUNT_SW_PAGE_FAULTS_MAJ},
163 {.name = "alignment-faults", .config = PERF_COUNT_SW_ALIGNMENT_FAULTS},
165 {.name = "emulation-faults", .config = PERF_COUNT_SW_EMULATION_FAULTS},
166 };
168 static intel_pmu_ctx_t g_ctx;
170 #if COLLECT_DEBUG
171 static void pmu_dump_events() {
173 DEBUG(PMU_PLUGIN ": Events:");
175 struct event *e;
177 for (e = g_ctx.event_list->eventlist; e; e = e->next) {
178 DEBUG(PMU_PLUGIN ": event : %s", e->event);
179 DEBUG(PMU_PLUGIN ": group_lead: %d", e->group_leader);
180 DEBUG(PMU_PLUGIN ": end_group : %d", e->end_group);
181 DEBUG(PMU_PLUGIN ": type : %#x", e->attr.type);
182 DEBUG(PMU_PLUGIN ": config : %#x", (unsigned)e->attr.config);
183 DEBUG(PMU_PLUGIN ": size : %d", e->attr.size);
184 }
185 }
187 static void pmu_dump_config(void) {
189 DEBUG(PMU_PLUGIN ": Config:");
190 DEBUG(PMU_PLUGIN ": hw_cache_events : %d", g_ctx.hw_cache_events);
191 DEBUG(PMU_PLUGIN ": kernel_pmu_events : %d", g_ctx.kernel_pmu_events);
192 DEBUG(PMU_PLUGIN ": software_events : %d", g_ctx.sw_events);
194 for (size_t i = 0; i < g_ctx.hw_events_count; i++) {
195 DEBUG(PMU_PLUGIN ": hardware_events[%zu]: %s", i, g_ctx.hw_events[i]);
196 }
197 }
199 #endif /* COLLECT_DEBUG */
201 static int pmu_config_hw_events(oconfig_item_t *ci) {
203 if (strcasecmp("HardwareEvents", ci->key) != 0) {
204 return -EINVAL;
205 }
207 g_ctx.hw_events = calloc(ci->values_num, sizeof(char *));
208 if (g_ctx.hw_events == NULL) {
209 ERROR(PMU_PLUGIN ": Failed to allocate hw events.");
210 return -ENOMEM;
211 }
213 for (int i = 0; i < ci->values_num; i++) {
214 if (ci->values[i].type != OCONFIG_TYPE_STRING) {
215 WARNING(PMU_PLUGIN ": The %s option requires string arguments.", ci->key);
216 continue;
217 }
219 g_ctx.hw_events[g_ctx.hw_events_count] = strdup(ci->values[i].value.string);
220 if (g_ctx.hw_events[g_ctx.hw_events_count] == NULL) {
221 ERROR(PMU_PLUGIN ": Failed to allocate hw events entry.");
222 return -ENOMEM;
223 }
225 g_ctx.hw_events_count++;
226 }
228 return 0;
229 }
231 static int pmu_config(oconfig_item_t *ci) {
233 DEBUG(PMU_PLUGIN ": %s:%d", __FUNCTION__, __LINE__);
235 for (int i = 0; i < ci->children_num; i++) {
236 int ret = 0;
237 oconfig_item_t *child = ci->children + i;
239 if (strcasecmp("ReportHardwareCacheEvents", child->key) == 0) {
240 ret = cf_util_get_boolean(child, &g_ctx.hw_cache_events);
241 } else if (strcasecmp("ReportKernelPMUEvents", child->key) == 0) {
242 ret = cf_util_get_boolean(child, &g_ctx.kernel_pmu_events);
243 } else if (strcasecmp("EventList", child->key) == 0) {
244 ret = cf_util_get_string_buffer(child, g_ctx.event_list_fn,
245 sizeof(g_ctx.event_list_fn));
246 } else if (strcasecmp("HardwareEvents", child->key) == 0) {
247 ret = pmu_config_hw_events(child);
248 } else if (strcasecmp("ReportSoftwareEvents", child->key) == 0) {
249 ret = cf_util_get_boolean(child, &g_ctx.sw_events);
250 } else {
251 ERROR(PMU_PLUGIN ": Unknown configuration parameter \"%s\".", child->key);
252 ret = -1;
253 }
255 if (ret != 0) {
256 DEBUG(PMU_PLUGIN ": %s:%d ret=%d", __FUNCTION__, __LINE__, ret);
257 return ret;
258 }
259 }
261 #if COLLECT_DEBUG
262 pmu_dump_config();
263 #endif
265 return 0;
266 }
268 static void pmu_submit_counter(int cpu, char *event, counter_t value) {
269 value_list_t vl = VALUE_LIST_INIT;
271 vl.values = &(value_t){.counter = value};
272 vl.values_len = 1;
274 sstrncpy(vl.plugin, PMU_PLUGIN, sizeof(vl.plugin));
275 if (cpu == -1) {
276 snprintf(vl.plugin_instance, sizeof(vl.plugin_instance), "all");
277 } else {
278 snprintf(vl.plugin_instance, sizeof(vl.plugin_instance), "%d", cpu);
279 }
280 sstrncpy(vl.type, "counter", sizeof(vl.type));
281 sstrncpy(vl.type_instance, event, sizeof(vl.type_instance));
283 plugin_dispatch_values(&vl);
284 }
286 static void pmu_dispatch_data(void) {
288 struct event *e;
290 for (e = g_ctx.event_list->eventlist; e; e = e->next) {
291 uint64_t all_value = 0;
292 int event_enabled = 0;
293 for (int i = 0; i < g_ctx.event_list->num_cpus; i++) {
295 if (e->efd[i].fd < 0)
296 continue;
298 event_enabled++;
300 uint64_t value = event_scaled_value(e, i);
301 all_value += value;
303 /* dispatch per CPU value */
304 pmu_submit_counter(i, e->event, value);
305 }
307 if (event_enabled > 0) {
308 DEBUG(PMU_PLUGIN ": %-20s %'10lu", e->event, all_value);
309 /* dispatch all CPU value */
310 pmu_submit_counter(-1, e->event, all_value);
311 }
312 }
313 }
315 static int pmu_read(__attribute__((unused)) user_data_t *ud) {
316 int ret;
318 DEBUG(PMU_PLUGIN ": %s:%d", __FUNCTION__, __LINE__);
320 ret = read_all_events(g_ctx.event_list);
321 if (ret != 0) {
322 ERROR(PMU_PLUGIN ": Failed to read values of all events.");
323 return ret;
324 }
326 pmu_dispatch_data();
328 return 0;
329 }
331 static int pmu_add_events(struct eventlist *el, uint32_t type,
332 event_info_t *events, size_t count) {
334 for (size_t i = 0; i < count; i++) {
335 /* Allocate memory for event struct that contains array of efd structs
336 for all cores */
337 struct event *e =
338 calloc(sizeof(struct event) + sizeof(struct efd) * el->num_cpus, 1);
339 if (e == NULL) {
340 ERROR(PMU_PLUGIN ": Failed to allocate event structure");
341 return -ENOMEM;
342 }
344 e->attr.type = type;
345 e->attr.config = events[i].config;
346 e->attr.size = PERF_ATTR_SIZE_VER0;
347 if (!el->eventlist)
348 el->eventlist = e;
349 if (el->eventlist_last)
350 el->eventlist_last->next = e;
351 el->eventlist_last = e;
352 e->event = strdup(events[i].name);
353 }
355 return 0;
356 }
358 static int pmu_add_hw_events(struct eventlist *el, char **e, size_t count) {
360 for (size_t i = 0; i < count; i++) {
362 size_t group_events_count = 0;
364 char *events = strdup(e[i]);
365 if (!events)
366 return -1;
368 char *s, *tmp;
369 for (s = strtok_r(events, ",", &tmp); s; s = strtok_r(NULL, ",", &tmp)) {
371 /* Multiple events parsed in one entry */
372 if (group_events_count == 1) {
373 /* Mark previously added event as group leader */
374 el->eventlist_last->group_leader = 1;
375 }
377 /* Allocate memory for event struct that contains array of efd structs
378 for all cores */
379 struct event *e =
380 calloc(sizeof(struct event) + sizeof(struct efd) * el->num_cpus, 1);
381 if (e == NULL) {
382 free(events);
383 return -ENOMEM;
384 }
386 if (resolve_event(s, &e->attr) == 0) {
387 e->next = NULL;
388 if (!el->eventlist)
389 el->eventlist = e;
390 if (el->eventlist_last)
391 el->eventlist_last->next = e;
392 el->eventlist_last = e;
393 e->event = strdup(s);
394 } else {
395 DEBUG(PMU_PLUGIN ": Cannot resolve %s", s);
396 sfree(e);
397 }
399 group_events_count++;
400 }
402 /* Multiple events parsed in one entry */
403 if (group_events_count > 1) {
404 /* Mark last added event as group end */
405 el->eventlist_last->end_group = 1;
406 }
408 free(events);
409 }
411 return 0;
412 }
414 static void pmu_free_events(struct eventlist *el) {
416 if (el == NULL)
417 return;
419 struct event *e = el->eventlist;
421 while (e) {
422 struct event *next = e->next;
423 sfree(e);
424 e = next;
425 }
427 el->eventlist = NULL;
428 }
430 static int pmu_setup_events(struct eventlist *el, bool measure_all,
431 int measure_pid) {
432 struct event *e, *leader = NULL;
433 int ret = -1;
435 for (e = el->eventlist; e; e = e->next) {
437 for (int i = 0; i < el->num_cpus; i++) {
438 if (setup_event(e, i, leader, measure_all, measure_pid) < 0) {
439 WARNING(PMU_PLUGIN ": perf event '%s' is not available (cpu=%d).",
440 e->event, i);
441 } else {
442 /* success if at least one event was set */
443 ret = 0;
444 }
445 }
447 if (e->group_leader)
448 leader = e;
449 if (e->end_group)
450 leader = NULL;
451 }
453 return ret;
454 }
456 static int pmu_init(void) {
457 int ret;
459 DEBUG(PMU_PLUGIN ": %s:%d", __FUNCTION__, __LINE__);
461 g_ctx.event_list = alloc_eventlist();
462 if (g_ctx.event_list == NULL) {
463 ERROR(PMU_PLUGIN ": Failed to allocate event list.");
464 return -ENOMEM;
465 }
467 if (g_ctx.hw_cache_events) {
468 ret =
469 pmu_add_events(g_ctx.event_list, PERF_TYPE_HW_CACHE, g_hw_cache_events,
470 STATIC_ARRAY_SIZE(g_hw_cache_events));
471 if (ret != 0) {
472 ERROR(PMU_PLUGIN ": Failed to add hw cache events.");
473 goto init_error;
474 }
475 }
477 if (g_ctx.kernel_pmu_events) {
478 ret = pmu_add_events(g_ctx.event_list, PERF_TYPE_HARDWARE,
479 g_kernel_pmu_events,
480 STATIC_ARRAY_SIZE(g_kernel_pmu_events));
481 if (ret != 0) {
482 ERROR(PMU_PLUGIN ": Failed to add kernel PMU events.");
483 goto init_error;
484 }
485 }
487 /* parse events names if config option is present and is not empty */
488 if (g_ctx.hw_events_count) {
490 ret = read_events(g_ctx.event_list_fn);
491 if (ret != 0) {
492 ERROR(PMU_PLUGIN ": Failed to read event list file '%s'.",
493 g_ctx.event_list_fn);
494 return ret;
495 }
497 ret = pmu_add_hw_events(g_ctx.event_list, g_ctx.hw_events,
498 g_ctx.hw_events_count);
499 if (ret != 0) {
500 ERROR(PMU_PLUGIN ": Failed to add hardware events.");
501 goto init_error;
502 }
503 }
505 if (g_ctx.sw_events) {
506 ret = pmu_add_events(g_ctx.event_list, PERF_TYPE_SOFTWARE, g_sw_events,
507 STATIC_ARRAY_SIZE(g_sw_events));
508 if (ret != 0) {
509 ERROR(PMU_PLUGIN ": Failed to add software events.");
510 goto init_error;
511 }
512 }
514 #if COLLECT_DEBUG
515 pmu_dump_events();
516 #endif
518 if (g_ctx.event_list->eventlist != NULL) {
519 /* measure all processes */
520 ret = pmu_setup_events(g_ctx.event_list, true, -1);
521 if (ret != 0) {
522 ERROR(PMU_PLUGIN ": Failed to setup perf events for the event list.");
523 goto init_error;
524 }
525 } else {
526 WARNING(PMU_PLUGIN
527 ": Events list is empty. No events were setup for monitoring.");
528 }
530 return 0;
532 init_error:
534 pmu_free_events(g_ctx.event_list);
535 sfree(g_ctx.event_list);
536 for (size_t i = 0; i < g_ctx.hw_events_count; i++) {
537 sfree(g_ctx.hw_events[i]);
538 }
539 sfree(g_ctx.hw_events);
540 g_ctx.hw_events_count = 0;
543 return ret;
544 }
546 static int pmu_shutdown(void) {
548 DEBUG(PMU_PLUGIN ": %s:%d", __FUNCTION__, __LINE__);
550 pmu_free_events(g_ctx.event_list);
551 sfree(g_ctx.event_list);
552 for (size_t i = 0; i < g_ctx.hw_events_count; i++) {
553 sfree(g_ctx.hw_events[i]);
554 }
555 sfree(g_ctx.hw_events);
556 g_ctx.hw_events_count = 0;
558 return 0;
559 }
561 void module_register(void) {
562 plugin_register_init(PMU_PLUGIN, pmu_init);
563 plugin_register_complex_config(PMU_PLUGIN, pmu_config);
564 plugin_register_complex_read(NULL, PMU_PLUGIN, pmu_read, 0, NULL);
565 plugin_register_shutdown(PMU_PLUGIN, pmu_shutdown);
566 }